	ADC Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Add with Carry
Z,C,N,V,S,H
	ADD Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Add without Carry
Z,C,N,V,S,H
	ADIW Rd+1:Rd,K ; d{24|26|28|30} , 0 =< K =< 63
Add Immediate to Word
' ' Representa caracter Ascii
Z,C,N,V,S
	AND Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Logical AND
Z,N,V,S
	ANDI Rd,K ; 16 =< d =< 31 , 0 =< K =< 255
Logical AND with Immediate
Z,N,V,S
' ' Representa caracter Ascii
	ASR Rd ; 0 =< d =< 31
Arithmetic Shift Right
Z,C,N,V,S
	BCLR s ; 0 =< s =< 7
Flag Clear
SREG(s)
	BLD Rd,b ; 0 =< d =< 31 , 0 =< b =< 7
Bit load from T to Register
	BRBC s, k ; 0 =< s =< 7 , -64 =< k =< +63
Branch if Status Flag Cleared
	BRBS s,k ; 0 =< s =< 7 , -64 =< k =< +63
Branch if Status Flag Set
	BREAK ; NONE
	BRCC k ; -64 =< k =< +63
Branch if Carry Cleared
If( C == 0 ) Simple

Complementary BRCS
	BRCS k ; -64 =< k =< +63
Branch if Carry Set
If( C == 1 ) Simple

Complementary BRCC
	BRNE k ; -64 =< k =< +63
Branch if Not Equal
If( Z == 0 ) Simple
If( Rd != Rr ) Signed | Unsigned

Complementary BREQ
	BREQ k ; -64 =< k =< +63
Branch if Equal
If( Z == 1 ) Simple
If( Rd == Rr ) Signed | Unsigned

Complementary BRNE
	BRMI k ; -64 =< k =< +63
Branch if Minus
If( N == 1 ) Simple

Complementary BRPL
	BRPL k ; -64 =< k =< +63
Branch if Plus
If( N == 0 ) Simple

Complementary BRMI
	BRTC k ; -64 =< k =< +63
Branch if T Flag Cleared
If( T == 0 ) Simple

Complementary BRTS
	BRTS k ; -64 =< k =< +63
Branch if T Flag Set
If( T == 1 ) Simple

Complementary BRTC
	BRVC k ; -64 =< k =< +63
Branch if Overflow Flag is Cleared
If( V == 0 ) Simple

Complementary BRVS
	BRVS k ; -64 =< k =< +63
Branch if Overflow Flag is Set
If( V == 1 ) Simple

Complementary BRVC
	BRHC k ; -64 =< k =< +63
Branch if Half Carry Flag Cleared
If( H == 0 ) Simple

Complementary BRHS
	BRHS k ; -64 =< k =< +63
Branch if Half Carry Flag Set
If( H == 1 ) Simple

Complementary BRHC
	BRID k ; -64 =< k =< +63
Branch if Interrupt Disabled
If( I == 0 ) Simple

Complementary BRIE
	BRIE k ; -64 =< k =< +63
Branch if Interrupt Enabled
If( I == 1 ) Simple

Complementary BRID
	BRSH k ; -64 =< k =< +63
Branch if Same or Higher
If( Rd >= Rr ) Unsigned
If( C == 0 ) Simple

Complementary BRLO
If( Rd < Rr ) Unsigned
	BRLO k ; -64 =< k =< +63
Branch if Lower
If( Rd < Rr ) Unsigned
If( C == 1 ) Simple

Complementary BRSH
If( Rd =< Rr ) Unsigned
	BRGE k ; -64 =< k =< +63
Branch if Greater or Equal
If( Rd >= Rr ) Signed
If( S  == 0) Simple

Complementary BRLT
If( Rd < Rr ) Signed
	BRLT k ; -64 =< k =< +63
Branch if Less Than
If( Rd < Rr ) Signed
If( S  == 1) Simple

Complementary BRGE
If( Rd >= Rr ) Signed
	BSET s ; 0 =< s =< 7
Flag Set
SREG(s)
	BST Rd,b ; 0 =< d =< 31 , 0 =< b =< 7
Bit Store from Register to T
T
	CALL k ; 0 =< k < 64K|4M
Call Subroutine
	CBI A, b ; 0 =< A =< 31 , 0 =< b =< 7
Clear Bit in I/O Register
	CBR Rd,K ; 16 =< d =< 31 , 0 =< K =< 25 . (ANDI with K complemented)
Clear Bit(s) in Register
Z,N,V,S
	CLC ; NONE
Clear Carry
C = 0
	CLH ; NONE
Clear Half Carry Flag in SREG
H = 0
	CLI ; NONE
Global Interrupt Disable
I = 0
	CLN ; NONE
Clear Negative Flag
N = 0
	CLR Rd ; 0 =< d =< 31 . (EOR Rd,Rd)
Clear Register
Z,N,V,S
	CLS ; NONE
Clear Signed Test Flag
S = 0
	CLT ; NONE
Clear T in SREG
T = 0
	CLV ; NONE
Clear Two’s Complement Overflow
V = 0
	CLZ ; NONE
Clear Zero Flag
Z = 0
	COM Rd ; 0 =< d =< 31
One’s Complement
Z,C,N,V,S
	CP Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Compare
Z,C,N,V,S,H
	CPC Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Compare with Carry
Z,C,N,V,S,H
	CPI Rd,K ; 16 =< d =< 31 , 0=< K =< 255
Compare with Immediate
Z,C,N,V,S,H
' ' Representa caracter Ascii
	CPSE Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Compare, Skip if Equal
	DEC Rd ; 0 =< d =< 31
Decrement
Z,N,V,S
	DES K ; 0x00 =< K =< 0x0F
	EICALL ; NONE
Extended Indirect Call to (Z)
	EIJMP ; NONE
Extended Indirect Jump to (Z)
	ELPM [Rd, Z[+]] ; 0 =< d =< 31
Extended Load Program Memory
	EOR Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Exclusive OR
Z,N,V,S
	ESPM ; NONE
Extended Store Program Memory
	FMUL Rd,Rr ; 16 =< d =< 23 , 16=< r =< 23
Fractional Multiply Unsigned
Z,C
	FMULS Rd,Rr ; 16 =< d =< 23 , 16=< r =< 23
Fractional Multiply Signed
Z,C
	FMULSU Rd,Rr ; 16 =< d =< 23 , 16=< r =< 23
Fractional Multiply Signed with Unsigned
Z,C
	ICALL ; NONE
Indirect Call to (Z)
	IJMP ; NONE
Indirect Jump to (Z)
	IN Rd,A ; 0 =< d =< 31 , 0 =< A =< 63
In From I/O Location
	INC Rd ; 0 =< d =< 31
Increment
Z,N,V,S
	JMP k ; 0 =< k < 4M
Jump
	LD Rd,[-]X[+]|[-]Y[+]|[-]Z[+] ; 0 =< d =< 31
Load Indirect
	LDD Rd,Y+q|Z+q ; 0 =< d =< 31 , 0 =< q =< 63
Load Indirect with Displacement
	LDI Rd,K ; 16 =< d =< 31 , 0 =< K =< 255
Load Immediate
' ' Representa caracter Ascii
	LDS Rd,k ; 0 =< d =< 31 , 0 =< k =< 65535 | 0x40 =< k =< 0xBF
Load Direct from data space
	LPM [Rd, Z[+]] ; 0 =< d =< 31
Load Program Memory
	LSL Rd ; 0 =< d =< 31
Logical Shift Left
Z,C,N,V,S,H
	LSR Rd ; 0 =< d =< 31
Logical Shift Right
Z,C,N,V,S
	MOV Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Copy Register
	MOVW Rd+1:Rd,Rr+1:Rr ; d{0,2,...,30} , r{0,2,...,30}
Copy Register Pair
	MUL Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Multiply Unsigned
Z,C
	MULS Rd,Rr ; 16 =< d =< 31 , 16 =< r =< 31
Multiply Signed
Z,C
	MULSU Rd,R ; r16 =< d =< 23 , 16 =< r =< 23
Multiply Signed with Unsigned
Z,C
	NEG Rd ; 0 =< d =< 31
Two’s Complement
Z,C,N,V,S,H
	NOP ; NONE
No Operation
	OR Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Logical OR
Z,N,V,S
	ORI Rd,K ; 16 =< d =< 31 , 0 =< K =< 255
Logical OR with Immediate
Z,N,V,S
' ' Representa caracter Ascii
	OUT A,Rr ; 0 =< r =< 31 , 0 =< A =< 63
Out To I/O Location
	POP Rd ; 0 =< d =< 31
Pop Register from Stack
	PUSH Rr ; 0 =< r =< 31
Push Register on Stack
	RCALL k ; -2K =< k < +2K
Relative Call Subroutine
	RET ; NONE
Subroutine Return
	RETI ; NONE
Interrupt Return
I
	RJMP k ; -2K =< k < +2K
Relative Jump
	ROL Rd ; 0 =< d =< 31 . (see ADC Rd,Rd)
Rotate Left Through Carry
Z,C,N,V,S,H
	ROR Rd ; 0 =< d =< 31
Rotate Right Through Carry
Z,C,N,V,S
	SBC Rd,Rr ; 0 =< d =< 31 , 0 =< r =< 31
Z,C,N,V,S,H
	SBCI Rd,K ; 16 =< d =< 31, 0 =< K =< 255
Z,C,N,V,S,H
	SBR Rd,K ; 16 =< d =< 31 , 0 =< K =< 255
Set Bit(s) in Register
Z,N,V,S
	SER Rd ; 16 =< d =< 31
Set Register
	SBRC Rr,b ; 0 =< r =< 31 , 0 =< b =< 7
Skip if Bit in Register Cleared
	SBRS Rr,b ; 0 =< r =< 31 , 0 =< b =< 7
Skip if Bit in Register Set
	SBI A,b ; 0 =< A =< 31, 0 =< b =< 7
Set Bit in I/O Register
	SBIC A,b ; 0 =< A =< 31, 0 =< b =< 7
Skip if Bit in I/O Register Cleared
	SBIS A,b ; 0 =< A =< 31, 0 =< b =< 7
Skip if Bit in I/O Register Set
	SBIW Rd+1:Rd,K ; d{24,26,28,30}, 0 =< K =< 63
Subtract Immediate from Word
Z,C,N,V,S
	SEC ; NONE
Set Carry
C = 1
	SEH ; NONE
Set Half Carry Flag in SREG
H = 1
	SEI ; NONE
Global Interrupt Enable
I = 1
	SEN ; NONE
Set Negative Flag
N = 1
	SES ; NONE
Set Signed Test Flag
S = 1
	SET ; NONE
Set T in SREG
T = 1
	SEV ; NONE
Set Two’s Complement Overflow
V = 1
	SEZ ; NONE
Set Zero Flag
Z = 1
	SLEEP ; NONE
Sleep
	SPM [Z+]
Store Program Memory
	ST [-]X[+]|[-]Y[+]|[-]Z[+],Rr ; 0 =< r =< 31
Store Indirect
	STD Y+q|Z+q,Rr ; 0 =< r =< 31 , 0 =< q =< 63
Store Indirect with Displacement
	STS k,Rr ; 0 =< r =< 31, 0 =< k =< 65535 | 0x40 =< k =< 0xBF
Store Direct to data space
	SUB Rd,Rr ; 0 =< d =< 31, 0 =< r =< 31
Z,C,N,V,S,H
	SUBI Rd,K ; 16 =< d =< 31, 0 =< K =< 255
Z,C,N,V,S,H
	SWAP Rd ; 0 =< d =< 31
Swap Nibbles
	TST Rd ; 0 =< d =< 31 (AND Rd, Rd)
Test for Zero or Minus
Z,N,V,S
	WDR ; NONE
Watchdog Reset
	/* ; Inicio de bloque de comentarios.
	*/ ; Fin de bloque de comentarios.
	, ; Separador de datos
Continuación de línea anterior para ".DB" (también aplicable a ".DW"),
usar en conjunto con continuación de línea "\".
Técnica (ejemplo):
 .DB "HOLA " \
 ,   "MUNDO." \
 ,   0B0000_0000,"SIGUIENTE TEXTO" \
 ,   0B0000_0000 ;FIN DE CADENA.
	#define 
Syntax
#define name [value]

#define name(arg, ...) [value]

Description
Define a preprocessor macro. There are two forms of macros, (1) object-like macros that basically define a constant, and (2) function-like macros that do parameter substitution. 

value may be any string, it is not evaluated until the macro is expanded (used). If value is not specified, it is set to 1.

Form (1) macros may be defined from the command line, using the -D option.

When form (2) is used, the macro must be called with the same number of arguments it is defined with. Any occurrences of arg in value will be replaced with the corresponding arg when the macro is called. Note that the left parenthesis must appear immediately after name (no spaces between), otherwise it will be interpreted as part of the value of a form (1) macro.

Examples
Note that the placement of the first '(' is very significant in the examples below.

#define EIGHT (1 << 3)

#define SQR(X) ((X)*(X))

	#undef 
Syntax
#undef name

Description
Undefine macro name previously defined with a #define directive. If name is not previously defined, the .undef directive is silently ignored, this behaviour is in accordance with the ANSI C standard. Macros may also be undefined from the command line using the -U option.

	#ifdef 
Syntax
#ifdef name

Description
All following lines until the corresponding #endif, #else, or #elif are conditionally assembled if name is previously #defined. Shorthand for #if defined(name)

Example
#ifdef FOO
// do something
#endif

	#ifndef 
Syntax
#ifndef name

Description
The opposite of #ifdef: All following lines until the corresponding #endif, #else, or #elif are conditionally assembled if name is not #defined. Shorthand for #if !defined(name)

	#if 
Syntax
#if condition

#elif condition

Description
All following lines until the corresponding #endif, #else, or #elif are conditionally assembled if condition is true (not equal to 0). condition may be any integer expression, including preprocessor macros which are expanded. The preprocessor recognizes the special operator defined(name) that returns 1 if name is #defined and 0 otherwise. Any un#defined symbols used in condition are silently evaluated to 0.

Conditionals may be nested to arbitrary depth. 

#elif evaluates condition in the same manner as #if, except that it is only evaluated if no previous branch of a compound #if .. #elif sequence has been evaluated to true.

Examples
#if 0
// code here is never included
#endif

#if defined(__ATmega48__) || defined(__ATmega88__)
// code specific for these devices
#elif defined (__ATmega169__)
// code specific for ATmega169
#endif // device specific code

	#elif 
Syntax
#if condition

#elif condition

Description
All following lines until the corresponding #endif, #else, or #elif are conditionally assembled if condition is true (not equal to 0). condition may be any integer expression, including preprocessor macros which are expanded. The preprocessor recognizes the special operator defined(name) that returns 1 if name is #defined and 0 otherwise. Any un#defined symbols used in condition are silently evaluated to 0.

Conditionals may be nested to arbitrary depth. 

#elif evaluates condition in the same manner as #if, except that it is only evaluated if no previous branch of a compound #if .. #elif sequence has been evaluated to true.

Examples
#if 0
// code here is never included
#endif

#if defined(__ATmega48__) || defined(__ATmega88__)
// code specific for these devices
#elif defined (__ATmega169__)
// code specific for ATmega169
#endif // device specific code

	#else 
Syntax
#else

Description
All following lines until the corresponding #endif are conditionally assembled if no previous branch in a compound #if ... #elif ... sequence has been evaluated to true.

Example
#if defined(__ATmega48__) || defined(__ATmega88__)
// code specific for these parts
#elif defined (__ATmega169__)
// code specific for ATmega169
#else
#error "Unsupported part:" __PART_NAME__
#endif // part specific code

	#endif 
Syntax
#endif

Description
Terminates a conditional block initiated with an #if, #ifdef, or #ifndef directive.

	#error 
Syntax
#error tokens

#warning tokens

#message tokens

Description
#error emits tokens to standard error, and increments the assembler error counter, hereby preventing the program from being successfully assembled. #error is specified in the ANSI C standard.

#warning emits tokens to standard error, and increments the assembler warning counter. #warning is not specified in the ANSI C standard, but is commonly implemented in preprocessors such as the GNU C preprocessor.

#message emits tokens to standard output, and does not affect assembler error or warning counters. #message is not specified in the ANSI C standard.

For all directives, the output will include file name and line number, like normal error and warning messages.

tokens is a sequence of preprocessor tokens. Preprocessor macros are expanded except if appearing inside quoted strings (").

Example
#error "Unsupported part:" __PART_NAME__

	#warning 
Syntax
#error tokens

#warning tokens

#message tokens

Description
#error emits tokens to standard error, and increments the assembler error counter, hereby preventing the program from being successfully assembled. #error is specified in the ANSI C standard.

#warning emits tokens to standard error, and increments the assembler warning counter. #warning is not specified in the ANSI C standard, but is commonly implemented in preprocessors such as the GNU C preprocessor.

#message emits tokens to standard output, and does not affect assembler error or warning counters. #message is not specified in the ANSI C standard.

For all directives, the output will include file name and line number, like normal error and warning messages.

tokens is a sequence of preprocessor tokens. Preprocessor macros are expanded except if appearing inside quoted strings (").

Example
#error "Unsupported part:" __PART_NAME__

	#message 
Syntax
#error tokens

#warning tokens

#message tokens

Description
#error emits tokens to standard error, and increments the assembler error counter, hereby preventing the program from being successfully assembled. #error is specified in the ANSI C standard.

#warning emits tokens to standard error, and increments the assembler warning counter. #warning is not specified in the ANSI C standard, but is commonly implemented in preprocessors such as the GNU C preprocessor.

#message emits tokens to standard output, and does not affect assembler error or warning counters. #message is not specified in the ANSI C standard.

For all directives, the output will include file name and line number, like normal error and warning messages.

tokens is a sequence of preprocessor tokens. Preprocessor macros are expanded except if appearing inside quoted strings (").

Example
#error "Unsupported part:" __PART_NAME__

	#include 
Syntax
#include "file"

#include <file>

Description
Include a file. The two forms differ in that (1) searches the current working directory first, and is functionally equivalent with the assembler .include directive. (2) does not search the current working directory unless explicitly specifying it with an "." entry in the include paht. Both forms will search a built-in known place after any explicitly specified path, this is the location for the partdef.inc include files supplied with the assembler.

It is strongly discouraged to use absolute  pathnames in #include directives, as this makes it difficult to move projects between different directories/computers. Use the -I command-line option to specify the include path, or set ut up in AVR Studio - Project -  Assembler Options.

Examples
#include <m48def.inc>

#include "mydefs.inc"

	#pragma , general-purpose
Syntax
#pragma warning range byte option

#pragma overlap option

#pragma error instruction

#pragma warning instruction

Description
The assembler evaluates constant integer expressions as 64-bit signed integers internally. When such expressions are used as immediate operands, they must be truncated to the number of bits  required by the instructions. For most operands, an out-of -range value will cause an "operand out of range" error message.  However, the immediate byte operands for the  ldi, cpi, ori, andi, subi, sbci instructions have several possible interpretations that are affected by this option.
option = integer  The immediate operand is evaluated as an integer, and if its value is outside the range [-128 ... 255] a warning is given. The assembler doesn't know if the users intends an integer operand to be signed or unsigned, hence it allows any signed or unsigned value that fits into a byte.
option = overflow (default): The immediate operand is basically evaluated as an unsigned byte, and any sign extension bits are ignored. This option is particularly suitable when dealing with bit masks, when the integer interpretation would cause lots of warnings, like ldi r16, ~((1 << 7) | (1 << 3))
option = none Disables all out-of-range warnings for byte operands. Not recommended.

If different sections of code are mapped to overlapping memory locations using the .org directive, an error message is normally issued. This options modifies that behaviour as follows:
option = ignore Ignores overlap conditions altogether; no errors, no warnings. Not recommended.
option = warning Produce warnings when overlaps are detected.
option = error Consider overlaps as error condition; this is the default and recommended setting.
option = default Revert to default handling - error or whatever is specified with the -O command line option.

The assembler maintains two settings for overlap handling: The default setting that is set up by the -O command-line option, and the effective setting, that only can be modified with this #pragma. The two settings are equal upon assembler invocation,  this #pragma changes the effective setting from the line it  is invoked and until the line it is changed by another invocation of this pragma. Hence, this pragma covers source line ranges and not address ranges.

See also: .overlap directive.

Causes use of instructions that are unsupported on the specified device to cause an assembler error (default behaviour)

Causes use of instructions that are unsupported on the specified device to cause an assembler warning.
 

See also
Command-line option -W.

Command-line option -O.

#pragma, AVR part related
Syntax
#pragma AVRPART ADMIN PART_NAME string

#pragma AVRPART CORE CORE_VERSION version-string

#pragma AVRPART CORE INSTRUCTIONS_NOT_SUPPORTED mnemonic[ operand[,operand] ][:...]

#pragma AVRPART CORE NEW_INSTRUCTIONS mnemonic[ operand[,operand]][:...]

#pragma AVRPART MEMORY PROG_FLASH size

#pragma AVRPART MEMORY EEPROM size

#pragma AVRPART MEMORY INT_SRAM SIZE size

#pragma AVRPART MEMORY INT_SRAM START_ADDR address

#pragma partinclude num

Description
These directives are used to specify various part-specific properties, and are normally used in the part definition include files (partdef.inc). Normally, there is no reason to use these pragmas directly in user programs.

Preprocessor macros are not allowed in pragmas. Expressions are not allowed for the numeric arguments, must be pure numbers in decimal, hex, octal, or binary format. String arguments must not be quoted. The pragmas specify the following part-specific properties:

The part name, e.g., ATmega8

The AVR Core version. This defines the basic instruction set supported. Allowed core versions are currently V0, V0E, V1, V2, and V2E.

Colon-separated list of instructions not supported by this part, relative to the core version.

Colon-separated list of additional instructions supported by this part, relative to the core version.

FLASH program memory size, in bytes.

EEPROM memory size, in bytes.

SRAM memory size, in bytes.

SRAM memory start address. 0x60 for basic AVR parts, 0x100 or more for parts with extended I/O.

For AVRASM1 compatibility. Default value: 0. If set to 1, it will cause the .device directive to include a file called device.h that is expected to contain the #pragmas described above. This enables partdef.inc files designed for AVRASM1 (containing a .device directive but no part-describing #pragmas) to be used with AVRASM2. This property can also be set using the -p command-line option, and is implicitly set when using the -1 command-line option.

Examples
Please note that the combination of these examples does not describe a real AVR part!

#pragma AVRPART ADMIN PART_NAME ATmega32

#pragma AVRPART CORE CORE_VERSION V2

#pragma AVRPART CORE INSTRUCTIONS_NOT_SUPPORTED movw:break:lpm rd,z

#pragma AVRPART CORE NEW_INSTRUCTIONS lpm rd,z+

#pragma AVRPART MEMORY PROG_FLASH 131072

#pragma AVRPART MEMORY EEPROM 4096

#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60

#pragma AVRPART MEMORY INT_SRAM SIZE  4096

	# (empty directive)
Syntax
#

Description
Unsurprisingly, this directive does exactly nothing. The only reason it exists is that it is required by the ANSI C standard.



















































	.BYTE - Reserve bytes to a variable
The BYTE directive reserves memory resources in the SRAM or EEPROM. In order to be able to refer to the reserved location, the BYTE directive should be preceded by a label. The directive takes one parameter, which is the number of bytes to reserve. The directive can not be used within a Code segment  (see directives CSEG, DSEG, and ESEG). Note that a parameter must be given. The allocated bytes are not initialized. 
Syntax: 
LABEL: .BYTE expression 

Example: 
.DSEG 
var1:    .BYTE 1            ; reserve 1 byte to var1 
table:   .BYTE tab_size     ; reserve tab_size bytes 

.CSEG 
         ldi r30,low(var1)  ; Load Z register low 
         ldi r31,high(var1) ; Load Z register high 
         ld r1,Z            ; Load VAR1 into register 1 

	.CSEG - Code segment
The CSEG directive defines the start of a Code Segment. An Assembler file can consist of several Code Segments, which are concatenated into one Code Segment when assembled. The BYTE directive can not be used within a Code Segment. The default segment type is Code. The Code Segments have their own location counter which is a word counter. The ORG directive can be used to place code and constants at specific locations in the Program memory. The directive does not take any parameters. 

Syntax: 
.CSEG 

Example: 
.DSEG                       ; Start data segment 
vartab: .BYTE 4             ; Reserve 4 bytes in SRAM 

.CSEG                       ; Start code segment 
const:  .DW 2               ; Write 0x0002 in prog.mem. 
        mov r1,r0           ; Do something 

	.CSEGSIZE - Program Memory Size
AT94K devices have a user configurable memory partition between the AVR Program memory and the data memory.  The program and data SRAM is divided into three blocks: 10K x 16 dedicated program SRAM, 4K x 8 dedicated data SRAM, and 6K x 16 or 12K x 8 configurable SRAM which may be swapped between program and data memory spaces in 2K x 16 or 4K x 8 partitions. 
This directive is used to specify the size of the program memory block. 

Syntax: 
.CSEGSIZE = 10 | 12 | 14 | 16 

Example: 
.CSEGSIZE = 12              ; Specifies the program meory size as 12K x 16 
  

	.DB - Define constant byte(s) in program memory and EEPROM
The DB directive reserves memory resources in the program memory or the EEPROM memory. In order to be able to refer to the reserved locations, the DB directive should be preceded by a label. The DB directive takes a list of expressions, and must contain at least one expression. The DB directive must be placed in a Code Segment or an EEPROM Segment. 

The expression list is a sequence of expressions, delimited by commas. Each expression must evaluate to a number between -128 and 255. If the expression evaluates to a negative number, the 8 bits twos complement of the number will be placed in the program memory or EEPROM memory location. 

If the DB directive is given in a Code Segment and the expressionlist contains more than one expression, the expressions are packed so that two bytes are placed in each program memory word. If the expressionlist contains an odd number of expressions, the last expression will be placed in a program memory word of its own, even if the next line in the assemby code contains a DB directive. The unused half of the program word is set to zero. A warning is given, in order to notify the user that an extra zero byte is added to the .DB statement 

Syntax: 
LABEL:  .DB expressionlist 

Example: 
.CSEG 
consts: .DB 0, 255, 0b01010101, -128, 0xaa 

.ESEG 
const2: .DB 1,2,3 

	.DEF - Set a symbolic name on a register
The DEF directive allows the registers to be referred to through symbols. A defined symbol can be used in the rest of the program to refer to the register it is assigned to. A register can have several symbolic names attached to it. A symbol can be redefined later in the program. 

Syntax: 
.DEF Symbol=Register 

Example: 
.DEF temp=R16 
.DEF ior=R0 

.CSEG 
 ldi temp,0xf0  ; Load 0xf0 into temp register 
 in ior,0x3f  ; Read SREG into ior register 
 eor temp,ior  ; Exclusive or temp and ior 

	.UNDEF - Undefine a register symbolic name
This directive is only available with AVRASM2.

'The UNDEF directive is used to undefine a symbol previously defined with the DEF directive. This provides a way to obtain a simple scoping of register definitions, to avoid warnings about register reuse.

Syntax: 
.UNDEF symbol

Example: 
.DEF var1 = R16 
ldi var1, 0x20
... ; do something more with var1
.UNDEF var1

.DEF var2 = R16  ; R16 can now be reused without warning.

	.DEVICE - Define which device to assemble for (deprecated)
Note: The .DEVICE directive is deprecated and should no longer be used with AVRASM2. It is replaced with a number of #pragma directives, describing the device properties. In AVRASM2, .device is roughly equivalent to #pragma AVRPART PART_NAME, but the device name may be anything and is not limited to the table below. Also, only the device name is set by .device, the other device properties must be set separately. The description and table below is only valid for AVRASM 1.x, ant the table is not updated with new devices.

The DEVICE directive allows the user to tell the Assembler which device the code is to be executed on. Using this directive, a warning is issued if an instruction not supported by the specified device occurs. If the Code Segment or EEPROM Segment are larger than supplied by the device, a warning message is given. If the directive is not used, it is assumed that all instructions are supported and that there are no restrictions on Program and EEPROM memory.

Syntax: 
.DEVICE <device code>

Example: 
.DEVICE AT90S1200  ; Use the AT90S1200 

.CSEG 
        push r30   ; This statement will generate a warning 
                   ; since the specified device does not 
                   ; have this instruction 

Note: There has been a change of names that took effect 14.06.2001. The following devices are affected: 

Old name            New name 

ATmega104           ATmega128 

ATmega32            ATmega323 

ATmega164           ATmega16

In order NOT to break old projects, both old and new device directives are allowed for the parts that are affected. 

	.DSEG - Data Segment
The DSEG directive defines the start of a Data segment. An assembler source file can consist of several data segments, which are concatenated into a single data segment when assembled. A data segment will normally only consist of BYTE directives (and labels). The Data Segments have their own location counter which is a byte counter. The ORG directive can be used to place the variables at specific locations in the SRAM. The directive does not take any parameters. 

Syntax: 
.DSEG  

Example: 
.DSEG                        ; Start data segment 
var1:  .BYTE 1               ; reserve 1 byte to var1 
table:  .BYTE tab_size       ; reserve tab_size bytes. 

.CSEG 
        ldi r30,low(var1)    ; Load Z register low 
        ldi r31,high(var1)   ; Load Z register high 
        ld r1,Z              ; Load var1 into register 1 

	.DW - Define constant word(s) in program memory and EEPROM
The DW directive reserves memory resources in the program memory or the EEPROM memory. In order to be able to refer to the reserved locations, the DW directive should be preceded by a label. 
The DW directive takes a list of expressions, and must contain at least one expression. 
The DB directive must be placed in a Code Segment or an EEPROM Segment. 

The expression list is a sequence of expressions, delimited by commas. Each expression must evaluate to a number between -32768 and 65535. If the expression evaluates to a negative number, the 16 bits two's complement of the number will be placed in the program memory or EEPROM memory location. 

Syntax: 
LABEL: .DW expressionlist 

Example: 
.CSEG 
varlist:  .DW 0, 0xffff, 0b1001110001010101, -32768, 65535 

.ESEG 
eevarlst: .DW 0,0xffff,10 

	.DD - Define constant doubleword(s) in program memory and EEPROM
These directives are only available with AVRASM2.

These directives  are very similar to the .DW directive, except they are used to define 32-bit (doubleword) and 64-bit (quadword) respectively. The data layout in memory is strictly little-endian.

Syntax: 
LABEL: .DD expressionlist
LABEL: .DQ expressionlist

Example: 
.CSEG 
varlist:  .DD 0, 0xfadebabe, -2147483648,  1 << 30

.ESEG 
eevarlst: .DQ 0,0xfadebabedeadbeef, 1 << 62 

	.DQ - Define constant quadword(s) in program memory and EEPROM
These directives are only available with AVRASM2.

These directives  are very similar to the .DW directive, except they are used to define 32-bit (doubleword) and 64-bit (quadword) respectively. The data layout in memory is strictly little-endian.

Syntax: 
LABEL: .DD expressionlist
LABEL: .DQ expressionlist

Example: 
.CSEG 
varlist:  .DD 0, 0xfadebabe, -2147483648,  1 << 30

.ESEG 
eevarlst: .DQ 0,0xfadebabedeadbeef, 1 << 62 

	.ELIF -  conditional assembly
.ELIF will include code until the corresponding ENDIF of the next ELIF at the same level if the expression is true, and both the initial .IF clause and all following .ELIF clauses are false.

.ELSE will include code until the corresponding .ENDIF if the initial.IF clause and all .ELIF clauses (if any) all are false.

Syntax: 
.ELIF<expression>
.ELSE

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF

Example: 
.IFDEF DEBUG
.MESSAGE "Debugging.."
.ELSE
.MESSAGE "Release.."
.ENDIF

	.ELSE -  conditional assembly
.ELIF will include code until the corresponding ENDIF of the next ELIF at the same level if the expression is true, and both the initial .IF clause and all following .ELIF clauses are false.

.ELSE will include code until the corresponding .ENDIF if the initial.IF clause and all .ELIF clauses (if any) all are false.

Syntax: 
.ELIF<expression>
.ELSE

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF

Example: 
.IFDEF DEBUG
.MESSAGE "Debugging.."
.ELSE
.MESSAGE "Release.."
.ENDIF

	.ENDIF -  conditional assembly
Conditional assembly includes a set of commands at assembly time. The ENDIF directive defines the end for the conditional IF or IFDEF or IFNDEF directives.

Conditionals (.IF...ELIF...ELSE...ENDIF blocks) may be nested, but all conditionals must be terminated at the end of file (conditionals may not span multiple files).

Syntax: 
.ENDIF

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF

Example: 
.IFNDEF DEBUG                         
.MESSAGE "Release.."
.ELSE
.MESSAGE "Debugging.."
.ENDIF

	.ENDM - End macro
The ENDMACRO directive defines the end of a macro definition. The directive does not take any parameters. See the MACRO directive for more information on defining macros. ENDM is an alternative form, fully equivalent with ENDMACRO.

Syntax: 
.ENDMACRO
.ENDM

Example: 
.MACRO SUBI16               ; Start macro definition 
        subi r16,low(@0)    ; Subtract low byte 
        sbci r17,high(@0)   ; Subtract high byte 
.ENDMACRO 

	.ENDMACRO - End macro
The ENDMACRO directive defines the end of a macro definition. The directive does not take any parameters. See the MACRO directive for more information on defining macros. ENDM is an alternative form, fully equivalent with ENDMACRO.

Syntax: 
.ENDMACRO
.ENDM

Example: 
.MACRO SUBI16               ; Start macro definition 
        subi r16,low(@0)    ; Subtract low byte 
        sbci r17,high(@0)   ; Subtract high byte 
.ENDMACRO 

	.EQU - Set a symbol equal to an expression
The EQU directive assigns a value to a label. This label can then be used in later expressions. A label assigned to a value by the EQU directive is a constant and can not be changed or redefined. 

Syntax: 
.EQU label = expression 

Example: 
.EQU io_offset = 0x23 
.EQU porta     = io_offset + 2 

.CSEG                 ; Start code segment 
        clr r2        ; Clear register 2 
        out porta,r2  ; Write to Port A 

	.ERROR - Outputs an error message string
The ERROR directive outputs a string and halts the assembling.  May be used in conditional assembly.

Syntax: 
.ERROR "<string>" 

Example: 
.IFDEF TOBEDONE
.ERROR "Still stuff to be done.."
.ENDIF

	.WARNING - Outputs a warning message string
The .WARNING directive outputs a warning string, but unlike the .ERROR directive does not halt assembling.  May be used in conditional assembly.

Syntax: 
.WARNING"<string>" 

Example: 
.IFDEF EXPERIMENTAL_FEATURE
.WARNING "This is not properly tested, use at own risk."
.ENDIF

 

	.ESEG - EEPROM Segment
The ESEG directive defines the start of an EEPROM segment. An assembler source file can consist of several EEPROM segments, which are concatenated into a single EEPROM segment when assembled. An EEPROM segment will normally only consist of DB and DW directives (and labels). The EEPROM segments have their own location counter which is a byte counter. The ORG directive can be used to place the variables at specific locations in the EEPROM. The directive does not take any parameters. 

Syntax: 
.ESEG    

Example: 
.DSEG                    ; Start data segment 
var1:   .BYTE 1          ; reserve 1 byte to var1 
table:  .BYTE tab_size   ; reserve tab_size bytes. 

.ESEG 
eevar1: .DW 0xffff        ; initialize 1 word in EEPROM 

	.EXIT - Exit this file
The EXIT directive tells the Assembler to stop assembling the file. Normally, the Assembler runs until end of file (EOF). If an EXIT directive appears in an included file, the Assembler continues from the line following the INCLUDE directive in the file containing the INCLUDE directive. 

Syntax: 
.EXIT 

Example: 
.EXIT  ; Exit this file 

	.INCLUDE - Include another file
The INCLUDE directive tells the Assembler to start reading from a specified file. The Assembler then assembles the specified file until end of file (EOF) or an EXIT directive is encountered. An included file may itself contain INCLUDE directives. 

Syntax: 
.INCLUDE "filename" 

Example: 
; iodefs.asm: 
.EQU sreg   = 0x3f     ; Status register 
.EQU sphigh = 0x3e     ; Stack pointer high 
.EQU splow  = 0x3d     ; Stack pointer low 

; incdemo.asm 
.INCLUDE iodefs.asm    ; Include I/O definitions 
        in r0,sreg     ; Read status register 

 
	.IF -  conditional assembly
Conditional assembly includes a set of commands at assembly time. The IFDEF directive will include code till the corresponding ELSE directive if <symbol> is defined.  The symbol must be defined with the EQU or SET directive. (Will not work with the DEF directive)  The IF directive will include code if <expression> is evaluated different from 0. Valid till the corresponding ELSE or ENDIF directive.

Up to 5 levels of nesting is possible.

Syntax: 
.IFDEF <symbol>
.IFNDEF <symbol>
.IF <expression>

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF
 

Example: 
.MACRO SET_BAT
.IF @0>0x3F
.MESSAGE "Address larger than 0x3f"
lds @2, @0
sbr @2, (1<<@1)
sts @0, @2
.ELSE
.MESSAGE "Address less or equal 0x3f"
.ENDIF
.ENDMACRO

 

	.IFDEF -  conditional assembly
Conditional assembly includes a set of commands at assembly time. The IFDEF directive will include code till the corresponding ELSE directive if <symbol> is defined.  The symbol must be defined with the EQU or SET directive. (Will not work with the DEF directive)  The IF directive will include code if <expression> is evaluated different from 0. Valid till the corresponding ELSE or ENDIF directive.

Up to 5 levels of nesting is possible.

Syntax: 
.IFDEF <symbol>
.IFNDEF <symbol>
.IF <expression>

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF
 

Example: 
.MACRO SET_BAT
.IF @0>0x3F
.MESSAGE "Address larger than 0x3f"
lds @2, @0
sbr @2, (1<<@1)
sts @0, @2
.ELSE
.MESSAGE "Address less or equal 0x3f"
.ENDIF
.ENDMACRO

 

	.IFNDEF -  conditional assembly
Conditional assembly includes a set of commands at assembly time. The IFDEF directive will include code till the corresponding ELSE directive if <symbol> is defined.  The symbol must be defined with the EQU or SET directive. (Will not work with the DEF directive)  The IF directive will include code if <expression> is evaluated different from 0. Valid till the corresponding ELSE or ENDIF directive.

Up to 5 levels of nesting is possible.

Syntax: 
.IFDEF <symbol>
.IFNDEF <symbol>
.IF <expression>

.IFDEF <symbol> |.IFNDEF <symbol>
...
.ELSE | .ELIF<expression>
...
.ENDIF
 

Example: 
.MACRO SET_BAT
.IF @0>0x3F
.MESSAGE "Address larger than 0x3f"
lds @2, @0
sbr @2, (1<<@1)
sts @0, @2
.ELSE
.MESSAGE "Address less or equal 0x3f"
.ENDIF
.ENDMACRO

 

	.LIST - Turn the listfile generation on
The LIST directive tells the Assembler to turn listfile generation on. The Assembler generates a listfile which is a combination of assembly source code, addresses and opcodes. Listfile generation is turned on by default. The directive can also be used together with the NOLIST directive in order to only generate listfile of selected parts of an assembly source file. 

Syntax: 
.LIST 

Example: 
.NOLIST                ; Disable listfile generation 
.INCLUDE "macro.inc"   ; The included files will not 
.INCLUDE "const.def"   ; be shown in the listfile 
.LIST                  ; Reenable listfile generation 

	.LISTMAC - Turn macro expansion on
The LISTMAC directive tells the Assembler that when a macro is called, the expansion of the macro is to be shown on the listfile generated by the Assembler. The default is that only the macro-call with parameters is shown in the listfile. 

Syntax: 
.LISTMAC 

Example: 
.MACRO MACX         ; Define an example macro 
        add  r0,@0  ; Do something 
        eor  r1,@1  ; Do something 
.ENDMACRO           ; End macro definition 

.LISTMAC            ; Enable macro expansion 
        MACX r2,r1  ; Call macro, show expansion 

	.MACRO - Begin macro
The MACRO directive tells the Assembler that this is the start of a Macro. The MACRO directive takes the Macro name as parameter. When the name of the Macro is written later in the program, the Macro definition is expanded at the place it was used. A Macro can take up to 10 parameters. These parameters are referred to as @0-@9 within the Macro definition. When issuing a Macro call, the parameters are given as a comma separated list. The Macro definition is terminated by an ENDMACRO directive. 

By default, only the call to the Macro is shown on the listfile generated by the Assembler. In order to include the macro expansion in the listfile, a LISTMAC directive must be used. A macro is marked with a + in the opcode field of the listfile. 
  
Syntax: 
.MACRO macroname 

Example: 
.MACRO SUBI16                   ; Start macro definition 
        subi @1,low(@0)         ; Subtract low byte 
        sbci @2,high(@0)        ; Subtract high byte 
.ENDMACRO                       ; End macro definition 

.CSEG                           ; Start code segment 
        SUBI16 0x1234,r16,r17   ; Sub.0x1234 from r17:r16 

	.MESSAGE - Output a message string
The MESSAGE directive outputs a string.  Useful in conditional assembly.

Syntax: 
.MESSAGE "<string>" 

Example: 
.IFDEF DEBUG
.MESSAGE "Debug mode"
.ENDIF

	.NOLIST - Turn listfile generation off
The NOLIST directive tells the Assembler to turn listfile generation off. The Assembler normally generates a listfile which is a combination of assembly source code, addresses and opcodes. Listfile generation is turned on by default, but can be disabled by using this directive. The directive can also be used together with the LIST directive in order to only generate listfile of selected parts of an assembly source file. 

Syntax: 
.NOLIST 

Example: 
.NOLIST                 ; Disable listfile generation 
.INCLUDE "macro.inc"    ; The included files will not 
.INCLUDE "const.def"    ; be shown in the listfile 
.LIST                   ; Reenable listfile generation 

	.ORG - Set program origin
The ORG directive sets the location counter to an absolute value. The value to set is given as a parameter. If an ORG directive is given within a Data Segment, then it is the SRAM location counter which is set, if the directive is given within a Code Segment, then it is the Program memory counter which is set and if the directive is given within an EEPROM Segment, it is the EEPROM location counter which is set. 

The default values of the Code and the EEPROM location counters are zero, and the default value of the SRAM location counter is the address immediately following the end of I/O address space (0x60 for devices without extended I/O, 0x100 or more for devices with extended I/O) when the assembling is started. Note that the SRAM and EEPROM location counters count bytes whereas the Program memory location counter counts words.  Also note that some devices lack SRAM and/or EEPROM.

Syntax: 
.ORG expression 

Example: 
.DSEG                ; Start data segment 

.ORG 0x120           ; Set SRAM address to hex 120
variable: .BYTE 1    ; Reserve a byte at SRAM adr. 0x120 

.CSEG 
.ORG 0x10            ; Set Program Counter to hex 10 
          mov r0,r1  ; Do something 

	.SET - Set a symbol equal to an expression
The SET directive assigns a value to a label. This label can then be used in later expressions. Unlike the .EQU directive, a label assigned to a value by the SET directive can be changed (redefined) later in the program.  

Syntax: 
.SET label = expression 

Example: 
.SET FOO = 0x114       ; set FOO to point to an SRAM location
        lds r0, FOO  ; load location into r0
.SET FOO = FOO + 1     ; increment (redefine) FOO. This would be illegal if using .EQU
        lds r1, FOO  ; load next location into r1
 

	.OVERLAP - Set up overlapping section
Introduced in AVRASM 2.1. These directives are for projects with special needs and should normally not be used.

These directives only affect the currently active segment (cseg/dseg/eseg).

The .overlap/nooverlap directives mark a section that  will be allowed to overlap code/data with code/data defined elsewhere, without any error or warning messages being generated. This is totally independent of what is set using the #pragma overlap directives. The overlap-allowed attribute will stay in effect across .org directives, but will not follow across .cseg/.eseg/.dseg directives (each segment marked separately). 

Syntax: 
.OVERLAP
.NOOVERLAP

Example:
.overlap 
.org 0                   ; section #1
    rjmp    default
.nooverlap

.org 0                   ; section #2
    rjmp    RESET        ; No error given here
.org 0                   ; section #3
    rjmp    RESET        ; Error here because overlap with #2

The typical use of this is to set up some form of default code or data that may or may not later be modified by overlapping code or data, without having to disable assembler overlap detection altogether.

	.NOOVERLAP - Set up overlapping section
Introduced in AVRASM 2.1. These directives are for projects with special needs and should normally not be used.

These directives only affect the currently active segment (cseg/dseg/eseg).

The .overlap/nooverlap directives mark a section that  will be allowed to overlap code/data with code/data defined elsewhere, without any error or warning messages being generated. This is totally independent of what is set using the #pragma overlap directives. The overlap-allowed attribute will stay in effect across .org directives, but will not follow across .cseg/.eseg/.dseg directives (each segment marked separately). 

Syntax: 
.OVERLAP
.NOOVERLAP

Example:
.overlap 
.org 0                   ; section #1
    rjmp    default
.nooverlap

.org 0                   ; section #2
    rjmp    RESET        ; No error given here
.org 0                   ; section #3
    rjmp    RESET        ; Error here because overlap with #2

The typical use of this is to set up some form of default code or data that may or may not later be modified by overlapping code or data, without having to disable assembler overlap detection altogether.
