
| Absolute value of ACC; zero carry bit | |
| Add ACCB and carry bit to ACC | |
| Add data memory value, with left shift, to ACC Add data memory value, with left shift of 16, to ACC Add short immediate to ACC Add long immediate, with left shift, to ACC | |
| Add ACCB to ACC | |
| Add data memory value and carry bit to ACC with sign extension suppressed | |
| Add data memory value to ACC with sign extension suppressed | |
| Add data memory value, with left shift specified by TREG1, to ACC | |
| Add short immediate to AR | |
| AND data memory value with ACCL; zero ACCH AND long immediate, with left shift, with ACC AND long immediate, with left shift of 16, with ACC | |
| AND ACCB with ACC Barrel-shift ACC right | |
| AND data memory value with DBMR, and store result in data memory location AND data memory value with long immediate and store result in data memory location | |