
| Branch unconditionally to program memory location | |
| Branch to program memory location specified by ACCL | |
| Delayed branch to program memory location specified by ACCL | |
| Branch to program memory location if AR not zero | |
| Delayed branch to program memory location if AR not zero | |
| Branch conditionally to program memory location | |
| Delayed branch conditionally to program memory location | |
| Delayed branch conditionally to program memory location | |
| Test bit | |
| Test bit specified by TREG2 | |
|
Block move from data to data memory Block move from data to data memory with destination address long immediate Block move from data to data memory with source address in BMAR Block move from data to data memory with destination address in BMAR |
|
| Block move from data to program memory with destination address in BMAR | |
| Block move from program to data memory with source address in BMAR Block move from program to data memory with source address long immediate |
|
| Barrel-shift ACC right |