LACB	Load ACC to ACCB
LACC	Load data memory value, with left shift, to ACC Load long immediate, with left shift, to ACC Load data memory value, with left shift of 16, to ACC
LACL	Load data memory value to ACCL; zero ACCH Load short immediate to ACCL; zero ACCH
LACT	Load data memory value, with left shift specified by TREG1, to ACC
LAMM	Load contents of memory mapped register to ACCL; zero ACCH
LAR	Load data memory value to Arx Load short immediate to Arx Load long immediate to Arx
LDP	Load data memory value to DP bits Load short immediate to DP bits
LMMR	Load data memory value to memory-mapped register
LPH	Load data memory value to PREG high byte
LST	Load data memory value to ST0 Load data memory value to ST1
LT	Load data memory value to TREG0
LTA	Load data memory value to TREG0; add PREG, with shift specified by PM bits, to ACC
LTD	Load data memory value to TREG0; add PREG, with shift specified by PM bits, to ACC; and move data
LTP	Load data memory value to TREG0; store PREG, with shift specified by PM bits, in ACC
LTS	Load data memory value to TREG0; subtract PREG, with shift specified by PM bits, from ACC